LSI Logic Sets New Logic and Memory Standard with RapidChip Integrator2 Family
MILPITAS, Calif. - Jan. 17, 2005 - LSI Logic Corporation (NYSE: LSI) today announced the availability of its RapidChip Integrator2TM Platform ASIC family, providing designers with 8 new slices ranging from 1.2 to 5.6 million gates of logic and up to 8 megabits of embedded MatrixRAM. The MatrixRAM technology provides architectural flexibility for memory in high through-put designs.
The RapidChip Integrator2 family enables high performance networking and switching applications, crucial requirements in the communications and storage markets. In addition, medical, industrial and military system designers can also benefit from using the RapidChip Integrator2 family. The family's I/Os support high speed memory interfaces such as DDR2, RLDRAM2, QDR2 and FCRAM2.
"With the RapidChip Integrator2 family of Platform ASICs, designers of complex SoCs have access to integration capabilities that were previously available only in cell-based ASIC implementations," said Yousef Khalilollahi, director RapidChip® Marketing, LSI Logic. "In addition, the RapidChip Integrator2 family, with enhanced logic and memory resources, enables the integration of multiple FPGAs into a single Platform ASIC, thereby delivering significant savings in component costs and board area."
The RapidChip Integrator2 technology enables customers to integrate multiple FPGAs into one RapidChip Integrator2 slice, gaining the added benefit of upgrading from DDR1 to DDR2 interfaces and taking advantage of ASIC-like density with lower power consumption and higher performance at an affordable unit cost.
MatrixRAM Blocks of Memory
The MatrixRAM memory block architecture used in the RapidChip Integrator2 family consists of a matrix of many 2-port memories (up to 124 in one block). These memories can be easily configured to be individual memories or combined together to form larger memories. This approach provides shallow and very wide memories or narrow and very deep memories that can be configured to fit design needs. Because the memories are grouped closely together in the Matrix they are extremely fast and routing overhead is low. MatrixRAM enables system designers to meet many diverse requirements including those in high performance communications and storage networking applications.
RapidChip Integrator2 I/O: Second Generation of Industry Interface Standards
The RapidChip Integrator2 family is ideally suited for the most demanding high I/O bandwidth applications with its second generation RapidChip Integrator2 I/O technology. RapidChip Integrator2 I/O supports the RLDRAM2 and FCRAM2 low latency memory interfaces required in high performance networking applications, the QDR high bandwidth memory interface primarily used in storage networking applications, and DDR2, which is fast becoming the industry's most common interface standard. In addition, RapidChip Integrator2 offers superior support for on-die termination, slew rate and source impedance control for improved signal integrity.
"Platform ASICs are clearly an important design solution for the future," said Dr. Handel Jones, founder and CEO of International Business Strategies. "With the introduction of the RapidChip Integrator2 , LSI Logic has advanced memory, logic and I/O resources, providing the unique benefit of design flexibility with platform features and price points better than those available with competing solutions."
