LSI Logic Drives High Performance Applications with Synthesized ARM1156t2-S Processor and Reference Design

  • LSI Logic's implementation of the ARM1156T2-S processor provides performance improvements over ARM9 technology-based solutions without increasing area
  • The LSI Logic reference design for the ARM1156T2-S processor includes the company's unique ECC Memory Protection core, providing cost-effective soft error protection

 

SAN FRANCISCO, March 7, 2005 - Today at the Embedded Systems Conference (Booth # 415), LSI Logic Corporation (NYSE: LSI) announced that the industry's first 450 MHz timing-closed ARM1156T2-STM processor core has been added to the LSI Logic CoreWare® IP library.  LSI Logic's implementation of the ARM1156T2-S processor minimizes die area without sacrificing performance and provides designers with lower inherent design risks and costs for a wide range of embedded applications such as high-performance disk drives, The core is available for cell-based ASIC design in the company's G90 90-nanometer technology.

Complementing the ARM1156T2-S core is a complete reference design with all of the necessary  peripherals for implementing an embedded design, including LSI Logic's unique ECC Memory Protection core that provides high-performance and cost-effective soft-error protection for tightly coupled memories on ARM processors.


LSI Logic's ARM1156T2-S offering includes a complete core reference design with Interrupt Controller, Synchronous Serial Interface, UART, GPIO, I2C, Timers, EBIU, APB bridge and the ECC Memory Protection Core. Delivered in RTL, the reference design provides a streamlined methodology for ARM users to quickly create and verify a custom processor subsystem for integration into a System-on-a-Chip (SoC).

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